A：The forward-looking statements in the conference call relate to the company's future profitability, cash flows, expectations regarding future business, timing, milestones, and payments related to government contracts, and expected magnitude of potential contracts. Factors that could cause actual results to differ include market acceptance of new products, the ability to convert design opportunities into customer revenue, replacement of revenue from end-of-life products, customer design activity, market acceptance of customers' products, potential contract non-receipt of revenue, ability to introduce and produce new products, competition, ability to hire and retain personnel, changes in product demand or supply, general economic conditions, political events, trade disputes, natural disasters, and tax rate changes.

A：The purpose of the demonstration of the new Rad Pro FPGA at the HEART conference was to showcase the company's radiation-hardened FPGA capabilities to leading defense prime contractors. The demonstration was internally funded and independent of the company's U.S. government contract. The successful demonstration and subsequent meetings with defense prime contractors are expected to lead to the potential sale of Rad Pro development kits, which could contribute to the company's Q2 and future revenue.

A：The company has signed several contracts related to Intel Ed technology, with a total value nearing $2 million. These smaller initial contracts are seen as a framework for larger contracts expected later in the year. The first contract was for Intel evaluation test chips, the second for a feasibility study that led to architectural enhancements for high-density EFGAs and discrete FPGAs, and the fourth contract focuses on providing hard IP for an Intel high-density EFGA core. There's also an expectation of a potential mid-six-figure contract from the customer in the second half of 2026 for additional architectural developments, and discussions are underway for the potential expansion of quicklogic's role to include front-end services for a customer-designed ASIC.

A：The timing of the commercial contract with the large customer based on Intel 18th is expected to change from late Q2 to Q3. The customer is evaluating an expansion in the size and function of the EFGA core in their ASIC to provide greater programmable flexibility, which is a beneficial trend for quicklogic.

A：Idaho Scientific selecting quicklogic's Efpga heart IP for A/D applications signifies a potential opportunity for quicklogic in the integrated defense systems market. The integration of the IP into the tape-out process anticipated next year could enable Idaho Scientific to deliver robust security systems with enhanced cryptographic security and respond to new markets with lower risks and costs.

A：The new contract is valued at $1.1 million and the EFPGA will be fabricated on the GF 2 process.

A：The company is making progress in the chiplet market by working on proposals that include direct US government, DIB, and commercial applications, targeting several fabrication processes like GlobalFoundries, TSMC, and Intel.

A：The purpose of the POC program was to move forward prior to customer commitments and accelerate the company's storefront chiplet initiatives. The outcomes include presenting a paper on the POC at the Chiplet Summit in February and giving a presentation at the Gomma Tech conference in March.

A：The primary challenge in the chiplet market is interoperability gaps.

A：Revenue for the first quarter was $5.1 million, up 16.5% from Q1 2025 and up 35.3% from Q4 2025. New product revenue was up 14.2% from Q1 2025 and 50.7% compared to Q4 2025, while mature product revenue was up 31.7% compared to the first quarter of 2025 and down 14.2% from the fourth quarter of 2025.

A：Non GAAP operating expenses in Q1 were approximately $3.3 million, compared to $3 million in Q1 2025 and $3.5 million in Q4 2025.

A：The non GAAP net loss was $1.3 million or a loss of 8 cents per share, compared to a non GAAP net loss of $1.1 million or loss of 7 cents per share in Q1 2025 and a non GAAP net loss of $1.4 million or loss of 9 cents per share in the fourth quarter of fiscal 25.

A：The total revenue guidance for the second fiscal quarter is $6 million plus or -10%, with an expectation of 5.2 million in new product revenue and 0.88 million in mature product revenue.

A：Non GAAP gross margin for the second quarter is expected to be approximately 42% plus or -5%, and non GAAP operating expenses are expected to be approximately $3.3 million plus or -5%.

A：The projected Q2 net loss is about $800,000 or a loss of approximately 4 cents per share.

A：The company raised approximately $6.4 million in net proceeds during Q2 2026. The projected cash use for Q2 is approximately $500,000, inclusive of money raised with the ATM.

A：The company has secured a new banking partner and reduced the credit line to $10 million, securing more favorable terms and lower borrowing costs.

A：Quicklogic has made significant investments in developing EFGA hard IP for Intel and in taping out their first RAPRO FPGA test chip. These internally funded investments have provided unique market positioning and enabled close alliances with strategic customers.

A：The first tangible outcomes from Quicklogic's investment include receiving numerous orders for RAPRO development kits for evaluation, which are expected to contribute to revenue and position Quicklogic well to address applications for various levels of radiation-hardened discrete FPGAs and EFGA hard IP for customer ASIC and SOC designs.

A：Quicklogic's collaboration with Intel is progressing well, with the first RAPRO development kits being received by customers for evaluation. The kits' contribution to revenue and the market positioning are significant, as Quicklogic is the first and currently only company to offer EFGA hard IP for Intel. The interaction with a government-backed customer underscores the broader industry interest, including the defense and commercial sectors, in the RAPRO technology.

A：The customer has awarded contracts with the potential for additional orders during the second half of the year. These contracts will enable Quicklogic to receive allotments of test chips to fully characterize the performance of their EFGA hard IP on Intel. This data is expected to accelerate new contract awards for digital and commercial applications.

A：Quicklogic is planning multiple project wafer tapeouts this year, all of which are for chips that will be sold via their storefront program. The costs for these tapeouts will be covered by customer contracts already on the books. The timing aligns with a strong outlook for design wins, based on the foundation built in preceding years.

A：The feedback from customers regarding the Rad Pro development kits indicates a positive response and uptake, evidenced by orders and requests for pricing and lead times. This interest aligns with key programs and suggests a favorable market reception, positioning Quicklogic well for future growth and the possibility of inclusion in new architectural designs.

A：Following the customer feedback on the Rad Pro development kits, further expectations include functional evaluation of the devices by customers, potential radiation testing, and the integration of Quicklogic's technology into customer architectures. Milestones to look for include the start of piggyback interest from customers for potentially designing Quicklogic's technology into future programs, aligning with the schedule for new silicon development.

A：Quicklogic sees expansion opportunities with Intel and other customers due to the tracking of numerous opportunities at different customers, some of whom are assessing potential use of architectural enhancements. Quicklogic is anticipating the expansion to include a broader customer base and is targeting both defense and commercial wins. The company is also seeing interest from the commercial side for their FPGAs.

A：The projected revenue growth for Quicklogic is estimated to be between 50% and 100% by mid-year. The guidance provided helps inform the approach to the year's revenue, although an exact profile has not been updated in the model. The company is considering a flexible approach towards the revenue projections, although no specific emphasis was given towards the low or high end of the growth estimate.

A：When scaling up, Storefront should expect a financial profile with higher gross margins and more predictable revenue recognition patterns once transitioning from the development kits and test kits to more repeatable product shipments.

A：The gross margin for the semiconductors device business is expected to be in the mid to high 60% range, which is higher and more predictable compared to other semiconductor companies because the devices are effectively completed and the costs of goods are more predictable.

A：The channel's role in customer acquisitions should be considered in terms of its potential to accelerate customer acquisitions by leveraging new commercial accounts, deepening defense and aerospace engagement, and assisting customers with AFI integration decisions earlier in the design cycle.

A：For a company like Quicklogic, the direct sales force comprises employees of the company, while the external sales force, or indirect, usually involves distributors or sales reps. In the context of design end products, early-stage architecture requires focused sales reps who can engage with ASIC teams and expose them to Quicklogic technology, leveraging established rapport and trust.

A：Having sales reps and distributors impacts Quicklogic's operating model by providing leverage through variable costs, as most sales reps and distributors are success-based and provide a commission on sales. This aligns financial incentives for the company with those for the sales reps and distributors, and it helps Quicklogic reach more potential customers than would be possible with its direct sales force alone.